Academic Year 2022 - 2023
Question Bank
Year/Semester: Department : CSE Unit : II
II/ III
Subject Code/Title : CS3351/ DIGITAL Section : Part A/B/C
Date: PRINCIPLES AND
COMPUTER
ORGANIZATION
Faculty Name : [Link]
SYNCHRONOUS SEQUENTIAL LOGIC
Part A:
1. What are the classifications of sequential circuits?
2. What is the operation of D flip-flop?
3. What is flip-flop
4. Define Race Around Condition
5. Difference between latch and flip-flop
6. Define Propagation Delay
7. What is Master Slave Flip-flop
8. Explain Shift Registers
9. What are the applications of Flip-flops
10. What is state diagram
11. Show D flip-flop implementation from a J-K flip-flop.
12. Write the characteristics table and equation of JK flip flop.
13. Write any two applications of shift registers
14 Give the truth table for J-K flip-flop.
15 Show the T-Flipflop implementation from SR flipflop.
16 What is meant by triggering of Flip flop?
17 Why D FF is known as Delay FF?
18 What is the minimum number of flip-flops needed to build a counter of modulus 60?
19 What is a universal shift register?
20 What is meant by triggering of Flip flop?
21 Differentiate between sequential and combinational circuits.
22 How many flip flops are required to realize MOD 50 counter?
23 What is a Mealy circuit?
24 What is finite state machine?
25. What do you meant by the term state reduction problem?
[Link] is ring counter?
27 How many states are there in 3-bit ring counter? What are they?
28 What are Mealy and Moor machines?
Part B:
1. A) Explain the Logic diagram & Truth table of JK flip-flop? (5)
B) Write difference between Combinational & Sequential circuits? (3)
2. A) Explain the Logic diagram & Truth table of SR flip-flop? (5)
B) Design and draw the 3 bit up-down synchronous counter? (3)
3. A) Draw and explain the operation of D Flip-Flop? (5)
B) Explain about Shift Registers? (5)
4. A) Draw and explain the operation of SR LATCH? (5)
B) Explain about Ring counter? (8)
5. A) Explain about ripple counter? (8)
B) What is state assignment? Explain with a suitable example? (8)
6. Explain the design of a 4 bit binary counter with parallel load in detail? (8)
7. How does it set eliminate is a Master –slave J-K flip-flop? (4)
8. A) Explain synchronous and ripple counters compare their merits and demerits? (8)
B) Design a 4 bit binary synchronous counters with D-flip flop? (8)
9. a)Write the truth table of clocked T- Flip Flop? (4)
b) Define shift registers? (4)
c) Write the differences between latches and flip flops? (4)
d) Write the differences between synchronous and asynchronous counters? (4)
e)Define Flip-flop and various types of flip flops? (4)
[Link] a synchronous counter with the following sequence: 0,1,3,7,6,4 and repeats. (8)
[Link] D flip flops, design a synchronous counter which counts in the sequence,
000,001,010,011,100,101,110,111,000 (8)
12. (i)Design a shift register using JK flip flops(8)
(ii) Explain the difference between a state table,characteristics table and an excitation table (4)
13. (i) How race condition can be avoided in a flip flops?(4)
(ii) Realize the sequential circuit for the state diagram show below. (4)
14. Design a synchronous counter that counts the sequence 000,001,010,011,100,101,110,111,000
Using D flipflop (12)
15. Implement T flipflop using D flipflop and JK flipflop using D flipflop. (12)
16. Design a binary counter using T flip flops to count in the following sequences:
(i) 000, 001, 010, 011, 100, 101, 111, 000
(ii) 000, 100, 111, 010, 011, 000 (16)
17. Design three bit synchronous counter with T flip flop and draw the diagram. (12)
18. Design a sequence detector that detects a sequence of three or more consecutive 1’s in a string of
bits coming through an input line and produces an output whenever this sequence is detected. (8)
.
PART – C
[Link] a modulo 5 synchronous counter using JK Flip Flop and implement it. Construct its timing
diagram.(16)
2. Design synchronous mod 16 counter using JK flip flop(16)
3A sequential circuit with two D flip-flops A and B, one input x and one output z is specified by the
following next-state and output equations:
A(t+1)= A′+B, B(t+1)=B′x, z=A+B′
(1) Draw the logic diagram of the circuit (4)
(2) Draw the state table (4)
(3) Draw the state diagram of the circuit (4)
(4)characteristics table and excitation table(4)
4. Consider the design of 4-bit BCD counter that counts in the following way
0000,0010,0011,….,1001 and back to 0000
(i) Draw the state diagram (4)
(ii) List the next state table (4)
(iii)Draw the logic diagram of the circuit (4)
5. Explain the working of the following (16)
i) J-K flip-flop ii) S- R flip-flop iii) D flip-flop
6. Design a MOD-10 synchronous counter using JK flip- [Link] execution table and state table.
(16)
Faculty Incharge Head of the Department
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HoD Remarks:
